It is often the case in power output stages that care must be taken to ensure that the corresponding power MOS field-effect transistors are not switched on/off too quickly, so as to keep to the prescribed maximum values of the slew rates of the output voltage or output current.
As a rule, for the correspondingly slow switch-off a discharge circuit is provided switchable between the gate electrode and the source electrode of the MOS field-effect transistor in each case. The gate-source capacitance of the MOS field-effect transistor is thus discharged according to a time constant, the value of which depends on the capacitance and on the internal impedance of the discharge circuit.
The desired fall time of the gate voltage is usually established by an ohmic resistance circuited in series with the gate-source capacitance or by a current impressed on the discharge circuit.
Although such a means of controlling the MOS field-effect transistor allows the slew rate of the output voltage or of the output current to be limited to a predetermined value, whereby the internal impedance of the discharge circuit is to be selected all the more higher, the lower the required fall rate, this has the disadvantage that the gate electrode of the MOS field-effect transistor is loaded with the relatively large internal impedance of the discharge circuit which in the case of noise being coupled into the circuit, particularly via the reverse capacitance, may result in an uncontrolled return ON of the already switched-off MOS field-effect transistor.